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2. Commands just for the OpenRISC 1000

The OpenRISC 1000 has one particular feature that is difficult for GDB. GDB models target processors with a register bank and a block of memory. The internals of GDB assume that there are not a huge number of registers in total.

The OpenRISC 1000 Special Purpose Registers (SPR) do not really fit well into this structure. There are too many of them (12 groups each with 2000+ entries so far, with up to 32 groups permitted) to be implemented as ordinary registers in GDB. Think what this would mean for the command info registers all. However they cannot be considered memory, since they do not reside in the main memory map.

The solution is to add two new commands to GDB to see the value of a particular SPR and to set the value of a particular SPR.

  1. info spr is used to show the value of a SPR or group of SPRs.
  2. spr is used to set the value of an individual SPR.
2.1 Using the info spr Command   Using the “info spr” command
2.2 Using the spr Command   Using the spr command
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2.1 Using the info spr Command

The value of an SPR is read by specifying either the unique name of the SPR, or the its group and index in that group. For example the Debug Reason Register (DRR, register 21 in group 6 (Debug)) can be read using any of the following commands:

 
info spr DRR
info spr debug DRR
info spr debug 21
info spr 6 DRR
info spr 6 21

In each case the output will be:

 
DEBUG.DRR = SPR6_21 = 0 (0x0)

It is also possible to inspect all the registers in a group. For example to look at all the Programmable Interrupt Controller registers (group 9), either of the following commands could be used:

 
info spr PIC
info spr 9

And the output would be:

 
PIC.PICMR = SPR9_0 = 0 (0x9)
PIC.PICSR = SPR9_2 = 0 (0x8)

Indicating that interrupts 0 and 4 are enabled and interrupt 4 is pending.

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2.2 Using the spr Command

The value of an SPR is written by specifying the unique name of the SPR or its group and index in the same manner as for the info spr command. An additional argument specifies the value to be written. So for example the Programmable Interrupt Controller mask register could be changed to enable interrupts 5 and 3 only by any of the following commands.

 
spr PICMR 0x24
spr PIC PICMR 0x24
spr PIC 0 0x24
spr 9 PICMR 0x24
spr 9 2 0x24
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