A sequence diagram, illustrating how the Or1ksim wrapper handles an interrupt when a character is written to the UART is shown in Figure 10.3. Only the interaction between the wrapper and the UART is shown, since the other components largely retain their existing functionality. The model is fully decoupled, but for compactness the actions to handle decoupled timing are omitted.

The Or1ksim wrapper maintains a separate process (a SystemC SC_METHOD) to handle interrupts. Similarly the UART adds a new thread to handle interrupts. Although not standard UML separate threads of control are shown for each of these objects in the sequence diagram.

Figure 10.3.  Sequence diagram for a write transaction on the Or1ksim SoC with interrupts.