Services - tools - models - for embedded software development
Embecosm divider strip
Prev  Next

7.2.5.  The CASEINCOMPLETE Warning

Rerunning the Verilator build without warnings disabled on the new command file now yields 52 warnings:

%Warning-CASEINCOMPLETE: ../orp_soc/rtl/verilog/ethernet/eth_shiftreg.v:124: Cas
e values incompletely covered (example pattern 0x0)
%Warning-CASEINCOMPLETE: Use "/* verilator lint_off CASEINCOMPLETE */" and lint_
on around source to disable this message.
%Warning-CASEINCOMPLETE: ../local/rtl/verilog/ethernet/eth_wishbone-2.v:618: Cas
e values incompletely covered (example pattern 0x1)

...
	

In this case Verilator is warning about a case statement with incomplete coverage of possible values. This is a source of potential error. The missing cases should be made explicit.

There are three occurrences of this problem in ORPSoC. These are corrected in a new command file (cf-optimized-5.scr). All the warnings covered by -Wno-lint have now been fixed, so a performance run need only turn off the COMBDLY and UNOPTFLAT warnings:

make clean verilate COMMAND_FILE=cf-optimized-5.scr \
     VFLAGS="-Wno-COMBDLY -Wno-UNOPTFLAT -language 1364-2001" NUM_RUNS=1000
	

This gives a performance of 43.31 kHz, still not significantly different to any of the previous performances.

Embecosm divider strip