by Mary Bennett

After many weeks of preparation, Chip Hack and ORConf are over for this year. I had a lot of fun, learned a lot and I am sure all who participated did, too.
Chip Hack started early on a rainy Wednesday morning with the setting up of the myStorm board tools. The previous time we ran a Chip Hack event this took almost the entire day and so we expected it to be difficult, but the tools were set up in an hour or two and were easy use. Before long everyone could flash an LED using Verilog.
In the afternoon, we tried to write a UART transmitter and a receiver. This was a lot harder to do, but most people managed at least one of the two. The UARTs were then used over the next two days with the EDSAC Verilog replica to interface some peripherals. We had three different Verilog EDSACs to use with the myStorm boards, written by Hatim Kanchwala, Bill Purvis and Ken Boak.
The two and a half days were scattered with very interesting talks. On the first day most of the talks were about Verilog and on the other days, the talks were about EDSAC, the early history of computing, and the computer conservation society EDSAC replica. All the slides are on the Chip Hack GitHub repo.
Immediately after Chip Hack came ORConf. A lot of people gave talks on multi-core and RISC-V designs, and Verilog verification, etc. This included Peter, Dan and I, who talked about the Chip Hack event that had just finished, and Hatim who talked about his Verilog EDSAC. Everyone was very friendly and enthusiastic about their special areas, and many pints of beer were shared from early evening to late in the night, almost every day.
There is a long list of people who made Chip Hack a possibility and I would like to thank all of them:
Thank you all for coming and I hope to see you at ORConf next year!

ORConf 2017 group photo