Comparing RISC-V compilers


In my last post I looked at how the tools we use in open source development can be used to assess the health of our communities. Recently I used those same techniques as part of a poster I presented at the RISC-V European Summit comparing GCC and LLVM for RISC-V.

I focused particularly on RISC-V compilers for microcontroller class cores, since this is an area where RISC-V has become well established, challenging Arm’s Cortex-M series of processors. In assessing the compiler I turned first to Embench, using an early draft of the Embench IoT 2.0 release. I started by looking at how the performance of GCC has evolved over the past 8 years, both in terms of the size of the code generated (which is typically important for microcontrollers) and the speed of the code. The specific cores where the Arm Cortex-M4 without FPU and the Open Hardware Foundation‘s CORE‑V CV32E40Pv2.

Both Arm and RISC-V compilers have improved over the years, with RISC-V maintaining a small edge in speed but being at a disadvantage in code size. RISC-V code size is improving slowly, with parity not expected until 2040! The code speed difference is not significant, with the old Embench IoT 1.0 benchmark, the positions were just reversed, just because it had a different mix of benchmarks, and a slightly different measurement technology.

I then looked at how GCC compared with Clang/LLVM using Embench 2.0. Overall GCC was marginally better on code size and LLVM on code speed. Although the benchmark is intended to be reported as a single number, it is instructive to see how individual benchmarks compare.

What we see is that for both code size and code speed, there are some benchmarks where GCC is better and some where Clang/LLVM is better. This is a valuable lesson in open source compiler engineers being across more than one compiler. LLVM engineers can see where they underperform and learn from GCC, while GCC engineers can similarly learn from LLVM.

Finally I came back the the community engagement measures I talked about in my previous post. I look at how many individual engineers and corporate domains were contributing to each of Arm and RISC-V over the 25 years since LLVM was launched.

Not surprisingly, the work for Arm starts sooner—it has been around longer. However it is striking that 8 years since RISC-V’s first release as part of LLVM, there are still nearly three times as many engineers contributing to Arm as RISC-V. What is even more notable is that Arm has twice as many corporate contributors. How can this be so, when the RISC-V Foundation has more than 4,000 members! It is truly an example of the Tragedy of the Commons.

So I finish with a call to arms (pardon the pun). If RISC-V is to succeed on the world stage, its member companies will need to invest far more in the tooling that support the architecture.